PAGE_FAULT_IN_NONPAGED_AREA (50)
This indicates that invalid system memory has been referenced.
Code:
1: kd> .bugcheck
Bugcheck code 00000050
Arguments fffff800`ca8fc7d4 00000000`00000000 ffffe001`11429aa5 00000000`00000002
Code:
1: kd> r cr2
cr2=fffff800ca8fc7d4
Code:
1: kd> !pte fffff800ca8fc7d4
VA fffff800ca8fc7d4
PXE at FFFFF6FB7DBEDF80 PPE at FFFFF6FB7DBF0018 PDE at FFFFF6FB7E0032A0 PTE at FFFFF6FC006547E0
contains 0000000000A04063 contains 0000000000A05063 contains 0000000000000000
pfn a04 ---DA--KWEV pfn a05 ---DA--KWEV not valid // Invalid
So why did ffffe001`11429aa5 attempt to write to fffff800`ca8fc7d4?
Code:
1: kd> kv
Child-SP RetAddr : Args to Child : Call Site
ffffd000`f6bbd968 fffff800`cadfd675 : 00000000`00000050 fffff800`ca8fc7d4 00000000`00000000 ffffd000`f6bbdbd0 : nt!KeBugCheckEx
ffffd000`f6bbd970 fffff800`cacd64a9 : 00000000`00000000 ffffe001`0ee25900 ffffd000`f6bbdbd0 ffffe001`00000005 : nt! ?? ::FNODOBFM::`string'+0x1e6c5
ffffd000`f6bbda10 fffff800`cadd8d2f : 00000000`00000000 00000000`00000000 00000000`00000000 00000000`00000000 : nt!MmAccessFault+0x769
ffffd000`f6bbdbd0 ffffe001`11429aa5 : ffffe001`114308fe ffffe001`0ee6a740 00000000`00000000 ffffe001`0ee6a7b8 : nt!KiPageFault+0x12f (TrapFrame @ ffffd000`f6bbdbd0) // Here
ffffd000`f6bbdd68 ffffe001`114308fe : ffffe001`0ee6a740 00000000`00000000 ffffe001`0ee6a7b8 ffffe001`0ee6a6a0 : 0xffffe001`11429aa5
ffffd000`f6bbdd70 ffffe001`0ee6a740 : 00000000`00000000 ffffe001`0ee6a7b8 ffffe001`0ee6a6a0 00000000`00000012 : 0xffffe001`114308fe
ffffd000`f6bbdd78 00000000`00000000 : ffffe001`0ee6a7b8 ffffe001`0ee6a6a0 00000000`00000012 ffffe001`0ee6a7b8 : 0xffffe001`0ee6a740
Code:
1: kd> .trap ffffd000`f6bbdbd0
NOTE: The trap frame does not contain all registers.
Some register values may be zeroed or incorrect.
rax=0000000000000000 rbx=0000000000000000 rcx=ffffe0010ee6a7b8
rdx=fffff800ca8fc7d4 rsi=0000000000000000 rdi=0000000000000000
rip=ffffe00111429aa5 rsp=ffffd000f6bbdd68 rbp=00000000fffffc60
r8=0000000000001000 r9=0000000000000000 r10=0000000000001000
r11=0000000000001000 r12=0000000000000000 r13=0000000000000000
r14=0000000000000000 r15=0000000000000000
iopl=0 nv up ei pl nz na po nc
ffffe001`11429aa5 450fb61411 movzx r10d,byte ptr [r9+rdx] ds:fffff800`ca8fc7d4=??
The failing instruction that was the reason for the bug check (address ffffe001`11429aa5), the r9 register + the rdx register was dereferenced. rdx = fffff800ca8fc7d4 (our 1st argument). This all results in a write to fffff800`ca8fc7d4. So we're dereferencing rdx and then ultimately writing to it at the same time. r9 is null as it's volatile, therefore it's trashed across calls (normal behavior). We can't check its contents. Overall, the instruction itself was to copy the contents of the r9 register + rdx and then zero extend it to the r10d register.
Can you run 8 passes of Memtest, please?
Memtest86+:
Download Memtest86+ here:
Memtest86+ - Advanced Memory Diagnostic Tool
Which should I download?
You can either download the pre-compiled .ISO that you would burn to a CD and then boot from the CD, or you can download the auto-installer for the USB key. What this will do is format your USB drive, make it a bootable device, and then install the necessary files. Both do the same job, it's just up to you which you choose, or which you have available (whether it's CD or USB).
Do note that some older generation motherboards do not support USB-based booting, therefore your only option is CD (or Floppy if you really wanted to).
How Memtest works (you don't need to read, it's only for those interested in the specifics):
Memtest uses algorithms (specifically two), namely moving inversion & what is deemed Modulo-X. Essentially, the first algorithm fills the memory with a pattern. Starting at the low address, it checks to see if the pattern was changed (it should not have been), writes the patterns complement, increments the address, and repeats. Starting at the highest address (as opposed to the lowest), it follows the same checklist.
The reason for the second algorithm is due to a few limitations, with the first being that not all adjacent cells are being tested for interaction due to modern chips being 4 to 16 bits wide regarding data storage. With that said, patterns are used to go ahead and ensure that all adjacent cells have at least been written with all possible one and zero combinations.
The second is that caching, buffering and out of order execution will interfere with the moving inversions algorithm. However, the second algorithm used is not affected by this. For starting offsets of 0-20, the algorithm will write every 20th location with a pattern, write all other locations with the patterns complement, repeat the previous one (or more) times, and then check every 20th location for the previously mentioned pattern.
Now that you know how Memtest actually works, it's important to know that the tests it goes through all mean something different. It goes from Test 0 through Test 12, many of which use either one or the other algorithm discussed above, among many other things.
Any other questions, they can most likely be answered by reading this great guide here:
FAQ : please read before posting
